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october 2016 docid026319 rev 2 1 / 32 this is information on a product in full production. www.st.com ldl112 1.2 a low quiescent current ldo with reverse current protection datasheet - production data features ? input voltage from 1.6 to 5.5 v ? very low - dropout voltage (300 mv typ. at 1 a load) ? low quiescent current (35 a typ. at no - load, 1 a max. in off mode) ? output voltage t olerance: 2.0% at 25 c ? 1.2 a guaranteed output current ? wide range of output voltages available on request: 0.8 v to 5 v with 50 mv step and adjustable ? logic - controlled electronic shutdown ? compatible with ceramic capacitor c out = 1 f ? inte rnal current and thermal limit ? available in dfn6 (2x2), dfn6 (3x3) mm, so8 - batwing and ppak packages ? temperature range: - 40 c to 125 c ? reverse current protection ? output discharge function (optional) applications ? consumer ? computer ? battery - powered systems ? low voltage point - of - load ? usb - powered devices description the ldl112 is a low - dropout linear r egulator, which can provide a maximum current of 1.2 a, with a typical dropout voltage of 300 mv. it is stabilized with a ceramic capacitor on the output. the very low drop voltage, low quiescent current and reverse current protection features make it suitable for low power battery - powered applications. the enable logic control function puts the ldl112 in shutdown mode allowing a total current consumption lower than 1 a. the device is equipped with current limit and thermal protection.
contents ldl112 2 / 32 docid026319 rev 2 contents 1 diagram ................................ ................................ ............................ 3 2 pin configuration ................................ ................................ ............. 4 3 typical application ................................ ................................ .......... 5 4 maximum ratings ................................ ................................ ............. 6 5 electrical characteristics ................................ ................................ 7 6 application information ................................ ................................ .. 9 6.1 thermal and short - circu it protections ................................ ................ 9 6.2 output voltage setting for adj version ................................ .............. 9 6.3 reverse current protection ................................ .............................. 10 7 typical performance characteristics ................................ ........... 11 8 package infor mation ................................ ................................ ..... 15 8.1 dfn6 (3x3) package information ................................ .................... 15 8.2 dfn6 (3x3) packing information ................................ ...................... 17 8.3 dfn6 (2x2) package information ................................ .................... 19 8.4 dfn6 (2x2) pack ing information ................................ ...................... 22 8.5 so8 - batwing package information ................................ .................. 23 8.6 so8 - batwing packing information ................................ ................... 25 8.7 ppak package information ................................ ............................. 26 8.8 ppak packing information ................................ .............................. 28 9 ordering information ................................ ................................ ..... 30 10 revision history ................................ ................................ ............ 31
ldl112 diagram docid026319 rev 2 3 / 32 1 diagram figure 1 : block diagram (*) the output discharge function is optional.
pin configuration ldl112 4 / 32 docid026319 rev 2 2 pin configuration figure 2 : pin connection dfn6 (3x3) and dfn6 (2x2) (top view) figure 3 : pin connection ppak and so8 (top view) table 1: pin description symbol function v in ldo input voltage gnd common ground en enable pin logic input: low = shutdown, high = active adj adjustable pin (on adjustable version) v out ldo output voltage exposed pad must be connected to gnd nc not connected
ldl112 typical appl ication docid026319 rev 2 5 / 32 3 typical application figure 4 : typical application circuits
maximum ratings ldl112 6 / 32 docid026319 rev 2 4 maximum ratings table 2: absolute maximum ratings symbol parameter value unit v in dc input voltage - 0.3 to 7 v v out dc output voltage - 0.3 to v i + 0.3 v v en enable input voltage - 0.3 to v i + 0.3 v v adj adj pin voltage 2 v i out output current internally limited ma p d power dissipation internally limited mw t stg storage temperature range - 65 to 150 c t op operating junction temperature range - 40 to 125 c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. all values are referred to gnd. table 3: thermal data symbol parameter dfn6 (3x3) dfn6 (2x2) so8 ppak unit r thja thermal resistance junction - ambient 55 65 55 (1) 100 c/w r thjc thermal resistance junction - case 10 15 20 8 c/w notes: (1) considering 6 cm2 of copper board heatsink.
ldl112 electrical characteristics docid026319 rev 2 7 / 32 5 electrical characteristics t j = 25 c, v in = v out(nom) + 0.5 v (for v out(nom) 1 v, v in = 2.1 v), c in = c out = 1 f, i out = 5 ma, v en = v in , unless otherwise specified. table 4: ldl112 ele ctrical characteristics (fixed version) symbol parameter test conditions min. typ. max. unit v in operating input voltage 1.6 5.5 v v out v out accuracy i out = 5 ma, t j = 25 c - 2.0 2.0 % i out = 5 ma, - 40 c < t j < 125 c - 3.0 3.0 % v out static line regulation (1) v out(nom) + 0.5 v < v in 5.5 v (2) 0.05 0.1 %/v v out static load regulation i out = 0 ma to 1.2 a, v in > 2.1 v 15 30 mv v drop dropout voltage (3) i out = 1 a, v out = 3.3 v 300 mv i out = 1.2 a,v out = 3.3 v 40 c < t j < 125 c 350 600 e n output noise voltage 10 hz to 100 khz, i out = 10 ma 135 v rms svr supply voltage rejection v in = v out(nom) + 0.5 v (2) +/ - v ripple v ripple = 0.2 v frequency = 1 khz, i out = 10 ma 57 db i q quiescent current i out = 0 ma, - 40 c < t j <125 c 35 70 a i out = 1.2 a, v out(nom) + 1 v (2) 40 c < t j < 125 c 250 400 v in input current in off mode: v en = gnd 0.1 1 i sc short - circuit current r l = 0, v in > 2.1 v 1.4 2 a v en enable input logic low v in = v out(nom) + 0.5 v (2) to 5.5 v, - 40 c < t j < 125 c 0.35 v enable input logic high v in = v out(nom) + 0.5 v (2) to 5.5 v - 40 c < t j < 125 c 1.4 i en enable pin input current v en = v in 100 na t shdn thermal shutdown 165 c hysteresis 20 c out output capacitor capacitance (see section 7: "typical performance characteristics" ) 1 10 f notes: (1) not applicable for v out(nom) > 4.5 v. (2) for v outnom lower than or equal to 1 v, v in = 2.1 v. (3) dropout voltage is the input - to - output voltage difference at which the output voltage is 100 mv below its nominal value.
electrical characteristics ldl112 8 / 32 docid026319 rev 2 t j = 25 c, v in = 2.1 v, c in = c out = 1 f, i out = 5 ma, v en = v in , unless otherwise specified. table 5: ldl112 electrical characteristics (adjustable version) symbol parameter test conditions min. typ. max. unit v in operating input voltage 1.6 5.5 v v adj v adj accuracy i out = 5 ma, t j = 25 c 784 800 816 mv i out = 5 ma, - 40 c < t j < 125 c - 3.0 3.0 % v out static line regulation (1) 2.1 v (2) v in 5.5 v, i out = 1 ma 0.05 0.1 %/v v out static load regulation i out = 0 ma to 1.2 a,v in > 2.1 v 6 20 mv v drop dropout voltage (3) i out = 1 a, v out = 3.3 v 300 mv i out = 1.2 a,v out = 3.3 v 40 c < t j < 125 c 350 600 e n output noise voltage 10 hz to 100 khz, i out = 10 ma 60 v rms i adj adjust pin current 0.130 1 a svr supply voltage rejection v in = v outnom + 0.5 v (2) +/ - v ripple v ripple = 0.2 v frequency = 1 khz i out = 10 ma 53 db i q quiescent current i out = 0 ma, - 40 c < t j < 125 c 35 70 a i out = 1.2 a, 2.1 v < v in < 5.5 v, - 40 c < t j < 125 c 240 400 v in input current in off mode: v en = gnd 0.1 1 i sc short - circuit current r l = 0, v in > 2.1 v 1.4 2 a v en enable input logic low v in = 2 v (2) to 5.5 v, - 40 c < t j < 125 c 0 0.35 v enable input logic high v in = 2 v (2) to 5.5 v, - 40 c < t j < 125 c 1.4 i en enable pin input current v en = v in 100 na t shdn thermal shutdown 165 c hysteresis 20 c out output capacitor capacitance (see section 7: "typical performance characteristics" ) 1 10 f notes: (1) not applicable for v out(nom) > 4.5 v. (2) for v out lower than or equal to 1 v, v in = 2.1 v. (3) dropout voltage is the input - to - output voltage difference at which the output voltage is 100 mv below its nominal value.
ldl112 application information docid026319 rev 2 9 / 32 6 application information 6.1 thermal and short - circuit protections the ldl112 is self - protected from short - circuit condition and overtemperature. when the output load is higher than the one supported by the device, the output current increases until the limit of typically 2 a is reached , at this point the current is kept constant even when the load impedance is zero. thermal protection acts when the junction temperature reaches 165 c, therefore the ic shuts down. as soon as the junction temperature falls again below the thermal hysteres is value the device starts working again. in order to calculate the maximum power that the device can dissipate, keeping the junction temperature below the t op , the following formula is used: equation 1 6.2 output voltage setting for adj version in the adjustable version, the output voltage can be set from 0.8 v up to the input voltage minus the voltage drop across the pass transistor (dropou t voltage), by connecting a resistor divider between the adj pin and the output, thus allowing remote voltage sensing. the resistor divider could be selected by the following equation: equation 2 it is recommended to use resistors with values in the rang e of 10 k? to 50 k?. lower values can also be suitable, but current consumption increases. p dmax = (125 - t amb )/r thj a
application information ldl112 10 / 32 docid026319 rev 2 6.3 reverse current protection the device avoids the reverse current to f low from output to input during any operating condition (with enable pin in high or low status).the reverse current protection acts in particular during fast turning on/off operations or when another power supply (with higher voltage than the input one) is connected to the output port. if a power supply with lower voltage than the ldo output voltage is connected to v out pin, ldo enters the current protection status, causing high power dissipation. in the application, the ldl112 reverse current protection ac ts in the following cases: 1. off - state, en pin is at gnd level, v out > [v in + 100 mv] . in this case the device power pass element (mosfet) is off, the bulk and gate are switched to v out and therefore all possible current paths from v out to v in are interrupte d. 2. on - state, en pin is at high level and v out > v out(nominal) . in this condition, v out is higher than the nominal level, so the device op - amp works in open loop and the power element is off. v gs is zero, the bulk and gate are switched to v out (where v out > [v in + 100 mv]) therefore all possible current paths from v out to v in are interrupted. 3. on - state, en pin is at high level and v out < v out(nominal) . in this condition v out is lower than the nominal level, so the op - amp works in open loop with the power mosfe t on. v gs is maximal so the power channel conducts with very low r ds(on) . when v out > v in the current can flow from v out to v in until the condition v out > (v in + 100 mv) is reached.
ldl112 typical performance characteristics docid026319 rev 2 11 / 32 7 typical performance characteristics (c in = c out = 1 f, v en to v in , t = 25 c unless otherwise specified) figure 5 : output voltage vs temperature (v out = 3.3 v, i out = 5 ma) figure 6 : output voltage vs temperature ( v out = 3.3 v, i out = 1.2 a ) figure 7 : output voltage vs temperature ( v out = v adj , i out = 5 ma) figure 8 : output voltage vs temperature (v out = v adj , i out = 1.2 a ) figure 9 : line regulation vs temperature figure 10 : load regulation vs temperature am14045v1 v i n = 3.8 v , i o u t =f rom 0 m a t o 1.2 a , v o u t = 3.3 v 0 5 10 15 20 25 30 35 40 - 60 - 40 - 20 0 20 40 60 80 1 0 0 1 2 0 1 4 0 load r e gu l a ti on [m v ] t e m p e r a tu r e [ c] am14044v1 v i n = 3 . 8v t o 5.5 v , i o u t = 1 . 2 a , v o u t = 3 . 3 v 0 0 . 02 0 . 04 0 . 06 0 . 08 0 . 1 0 . 12 0 . 14 0 . 16 0 . 18 0 . 2 - 60 - 40 - 20 0 20 40 60 80 1 0 0 1 2 0 1 4 0 l i ne r e gu l a ti on [ % / v ] t e m p e r a tu r e [ c] am14040v1 v i n = 3 . 8 v , i o u t = 5 ma , v o u t = 3 . 3 v 3 3 . 1 3 . 2 3 . 3 3 . 4 3 . 5 3 . 6 - 60 - 40 - 20 0 20 40 60 80 1 0 0 1 2 0 1 4 0 o u t pu t v o l t a g e [ v ] t e m p e r a t u r e [ c] am14041v1 3 3 . 1 3 . 2 3 . 3 3 . 4 3 . 5 3 . 6 - 60 - 40 - 20 0 20 40 60 80 1 0 0 1 2 0 1 4 0 o u t pu t v o l t a g e [ v ] t e mp e r a tu r e [ c] v i n = 3 . 8 v , i o u t = 1 . 2 a , v o u t = 3 . 3 v am14042v1 0 . 7 0 . 72 0 . 74 0 . 76 0 . 78 0 . 8 0 . 82 0 . 84 0 . 86 0 . 88 0 . 9 - 60 - 40 - 20 0 20 40 60 80 1 0 0 1 2 0 1 4 0 o u t pu t vo l t a g e [ v ] t e m p e r a t u r e [ c] v i n = 1.6 v , i o u t = 5 ma , v o u t = v a d j am14043v1 0 . 7 0 . 72 0 . 74 0 . 76 0 . 78 0 . 8 0 . 82 0 . 84 0 . 86 0 . 88 0 . 9 - 60 - 40 - 20 0 20 40 60 80 1 0 0 1 2 0 1 4 0 o u t pu t v o l t a g e [ v ] t e m p e r a tu r e [ c] v i n = 2 v , i o u t = 1 . 2 a , v o u t = v a d j
typical performance characteristics ldl112 12 / 32 docid026319 rev 2 figure 11 : quiescent current vs temperature ( i out = 0 ma) figure 12 : quiescent current vs temperature ( i out = 1.2 a) figure 13 : shutdown current vs temperature figure 14 : quiescent current vs load current figure 15 : dropout voltage vs temperature ( i out = 600 ma) figure 16 : dropout voltage vs temperature ( i out = 1.2 a) am14049v1 v i n = 2 v , v o u t = v a d j , t = 2 5 c 0 50 1 0 0 1 5 0 2 0 0 2 5 0 3 0 0 0 2 0 0 4 0 0 6 0 0 8 0 0 1 0 00 1 2 00 q u i esce n t c u rr e n t [ a ] lo a d c u rr e n t [ m a ] am14048v1 v i n = 2 v , v e n = g nd , v o u t = v a d j 0 0 . 5 1 1 . 5 2 2 . 5 - 60 - 40 - 20 0 20 40 60 80 1 0 0 1 2 0 1 4 0 q u i esce n t c u rr e n t [ a ] t e mp e r a t u r e [ c] am14051v1 i o u t = 1 . 2 a , v o u t = 3 . 3 v 0 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 - 60 - 40 - 20 0 20 40 60 80 1 0 0 1 2 0 1 4 0 d r opou t v o lt a ge [m v ] t e m p e r a t u r e [ c] am14047v1 v i n = 3 .8 v , i o u t = 1 .2 a , v o u t = 3 . 3 v 0 50 1 0 0 1 5 0 2 0 0 2 5 0 3 0 0 3 5 0 4 0 0 4 5 0 5 0 0 - 60 - 40 - 20 0 20 40 60 80 1 0 0 1 2 0 1 4 0 q u i esce n t c u rr e n t [ a ] t e mp e r a tu r e [ c] am14050v1 i o u t = 0 . 6 a , v o u t = 3 . 3 v 0 50 1 0 0 1 5 0 2 0 0 2 5 0 3 0 0 3 5 0 4 0 0 - 60 - 40 - 20 0 20 40 60 80 1 0 0 1 2 0 1 4 0 d r opou t v o lt a ge [m v ] t e m p e r a t u r e [ c] am14046v1 v i n = 3 . 8 v , i o u t = 0 m a , v o u t = 3 . 3 v 0 10 20 30 40 50 60 70 80 90 1 0 0 - 60 - 40 - 20 0 20 40 60 80 1 0 0 1 2 0 1 4 0 q u i esce n t c u rr e n t [ a ] t e mp e r a t u r e [ c]
ldl112 typical performance characteristics docid026319 rev 2 13 / 32 figure 17 : dropout voltage vs load current figure 18 : short - circuit current vs input voltage figure 19 : enable thresholds vs temperature figure 20 : svr vs frequency figure 21 : output noise spectral density figure 22 : stability plan vs c out , esr am14057v2 0 0 . 5 1 1 . 5 2 2 . 5 3 0 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 e s r @ 1 0 0 k h z [ ] c o u t [ f ] ( n o m i n a l v a l u e ) v i n f r o m 2 t o 5 . 5 v , i o u t f r o m 0 t o 1 . 2 a , c i n = 1 f s t a b i l i t y a r e a am14053v1 v o u t = 3 . 3 v , t = 2 5 c 0 0 . 5 1 1 . 5 2 2 . 5 3 0 1 2 3 4 5 6 sho rt c i r c u it c u rr e n t [ a ] i npu t v o l t a g e [ v ] am14054v1 v i n = 3 .8 v 0 . 2 0 . 4 0 . 6 0 . 8 1 1 . 2 1 . 4 1 . 6 1 . 8 - 60 - 40 - 20 0 20 40 60 80 1 0 0 1 2 0 1 4 0 e n a b l e v o l t a g e [ v ] t e m p e r a tu r e [ c] low h i am14055v1 0 10 20 30 40 50 60 70 100 1000 10000 100000 1000000 svr [ d b ] f r e qu e n c y [ h z] v out = 3 . 3v v out =v adj v in = 1 . 6 v o r 3 . 8 v + / - 200 m v , i o ut = 10 m a , c o ut = 1f am14057v1 v i n = 1 . 6v or 3 .8 v , c i n = c o u t = 1 f 0 1 2 3 4 5 6 7 8 0. 0 1 0.1 1 10 1 0 0 o u t pu t n o ise d e n si t y [ m v / s qrt (h z ) ] fr e qu e n c y : f [ k h z] v out = 3 . 3v v out =v adj am14052v1 v o u t = v a d j , t = 2 5 c 0 50 1 0 0 1 5 0 2 0 0 2 5 0 3 0 0 3 5 0 4 0 0 10 2 1 0 4 1 0 6 1 0 8 1 0 1 0 10 d r opou t vo lt a ge [m v ] lo a d c u rr e nt [ m a ]
typical performance characteristics ldl112 14 / 32 docid026319 rev 2 figure 23 : line transient figure 24 : load transient figure 25 : enable transient figure 26 : turn - on time am14059v1 v i n = v e n = 4 v , i o u t =f rom 5 m a t o 1.2 a , v o u t = 3.3 v , t r = t f = 5 s i o u t v o u t am14060v1 v i n = 4 v , v e n = 0v t o 2 v , i o u t = 1.2 a , v o u t = 3.3 v , t r = t f = 1 s i o u t v ou t v e n am14058v1 v i n =f rom 3.5v t o 5.5 v , v e n = 2 v , i o u t = 10 ma , v o u t = 3.3 v , c o u t = 1 f , t r = t f = 1 s v o u t v e n am14061v1 v i n = v e n = f rom 0v t o 5 . 5 v , i o u t = 5 ma , v o u t = 3 . 3 v , t r = t f = 5 s v ou t v e n
ldl112 package information docid026319 rev 2 15 / 32 8 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack ? is an st trademark. 8.1 dfn6 (3x3) package information figure 27 : dfn6 (3x3) package outline
package information ldl112 16 / 32 docid026319 rev 2 table 6: dfn6 (3x3) mechanical data dim. mm min. typ. max. a 0.80 1 a1 0 0.02 0.05 a3 0.20 b 0.23 0.45 d 2.90 3 3.10 d2 2.23 2.50 e 2.90 3 3.10 e2 1.50 1.75 e 0.95 l 0.30 0.40 0.50 figure 28 : dfn6 (3x3) recommended footprint
ldl112 package information docid026319 rev 2 17 / 32 8.2 dfn6 (3x3) packing information figure 29 : dfn6 (3x3) tape outline 7875978_n
package information ldl112 18 / 32 docid026319 rev 2 figure 30 : dfn6 (3x3) reel outline table 7: dfn6 (3x3) tape and reel mechanical d ata dim. mm min. typ. max. a0 3.20 3.30 3.40 b0 3.20 3.30 3.40 k0 1 1.10 1.20 7875978_n
ldl112 package information docid026319 rev 2 19 / 32 8.3 dfn6 (2x2) package information figure 31 : dfn6 (2x2) package outline
package information ldl112 20 / 32 docid026319 rev 2 table 8: dfn6 (2x2) mechanical data dim. mm min. typ. max. a 0.70 0.75 0.80 a1 0.00 0.02 0.05 a3 - 0.203 ref - b 0.25 0.30 0.35 d - 2.00 - e - 2.00 - e - 0.50 - d2 0.77 0.92 1.02 e2 1.30 1.45 1.55 k 0.15 - - l 0.20 0.30 0.40 aaa - 0.05 - bbb - 0.10 - ccc - 0.10 - ddd - 0.05 - eee - 0.08 -
ldl112 package information docid026319 rev 2 21 / 32 figure 32 : dfn6 (2x2) recommended footprint 7733060 reve
package information ldl112 22 / 32 docid026319 rev 2 8.4 dfn6 (2x2) packing information figure 33 : dfn6 (2x2) reel outline table 9: dfn6 (2x2) tape and reel mechanical data dim. mm min. typ. max. a 180 c 12.8 13.2 d 20.2 n 60 t 14.4 a0 2.4 b0 2.4 k0 1.3 p0 4 p 4
ldl112 package information docid026319 rev 2 23 / 32 8.5 so8 - batwing package information figure 34 : so - 8 batwing package outline table 10: so - 8 batwing mechanical data dim. mm min . typ . max . a 1.75 a1 0.10 0.25 a2 1.25 b 0.31 0.51 b1 0.28 0.48 c 0.10 0.25 c1 0.10 0.23 d 4.80 4.90 5.00 e 5.80 6.00 6.20 e1 3.80 3.90 4.00 e 1.27 h 0.25 0.50 l 0.40 1.27 l1 1.04 l2 0.25 k 0 8 ccc 0.10
package information ldl112 24 / 32 docid026319 rev 2 figure 35 : so - 8 batwing recommended footprint
ldl112 package information docid026319 rev 2 25 / 32 8.6 so8 - batwing packing information figure 36 : so8 - batwing tape and reel outline table 11: so8 - batwing mechanical data dim. mm min. typ. max. a 330 c 12.8 13.2 d 20.2 n 60 t 22.4 a0 8.1 8.5 b0 5.5 5.9 k0 2.1 2.3 p0 3.9 4.1 p 7.9 8.1
package inf ormation ldl112 26 / 32 docid026319 rev 2 8.7 ppak package information figure 37 : ppak package outline
ldl112 package information docid026319 rev 2 27 / 32 table 12: ppak mechanical data dim. mm min. typ. max. a 2.2 2.4 a1 0.9 1.1 a2 0.03 0.23 b 0.4 0.6 b2 5.2 5.4 c 0.45 0.6 c2 0.48 0.6 d 6 6.2 d1 5.1 e 6.4 6.6 e1 4.7 e 1.27 g 4.9 5.25 g1 2.38 2.7 h 9.35 10.1 l2 0.8 1 l4 0.6 1 l5 1 l6 2.8 r 0.20 v2 0 8
package information ldl112 28 / 32 docid026319 rev 2 8.8 ppak packing information figure 38 : ppak tape outline figure 39 : ppak reel outline
ldl112 package information docid026319 rev 2 29 / 32 table 13: ppak mechanical data tape reel dim. mm dim. mm min. max. min. max. a0 6.8 7 a 330 b0 10.4 10.6 b 1.5 b1 12.1 c 12.8 13.2 d 1.5 1.6 d 20.2 d1 1.5 g 16.4 18.4 e 1.65 1.85 n 50 f 7.4 7.6 t 22.4 k0 2.55 2.75 p0 3.9 4.1 base qty. 2500 p1 7.9 8.1 base qty. 2500 p2 1.9 2.1 r 40 t 0.25 0.35 w 15.7 16.3
ordering information ldl112 30 / 32 docid026319 rev 2 9 ordering information table 14: order codes dfn6 (3x3) dfn6 (2x2) so8 - batwing ppak output voltage (v) ldl112pv10r ldl112pu10r ldl112d10r 1.0 ldl112pv12r LDL112PU12R ldl112d12r 1.2 ldl112pv15r ldl112pu15r ldl112d15r 1.5 ldl112pv18r ldl112pu18r ldl112d18r 1.8 ldl112pv25r ldl112pu25r ldl112d25r 2.5 ldl112pv30r ldl112pu30r ldl112d30r 3.0 ldl112pv33r ldl112pu33r ldl112d33r 3.3 ldl112pvr ldl112pur ldl112dr ldl112pt - tr adj
ldl112 revision history docid026319 rev 2 31 / 32 10 revision history table 15: document revision history date revision changes 21 - nov - 2014 1 initial release. 28 - oct - 2016 2 updat ed figure 31: "dfn6 (2x2) package outline" . modified table 14: "order codes" . minor text changes.
ldl112 32 / 32 docid0263 19 rev 2 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and s t assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information se t forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics C all rights reserved

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